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  1 typical a pplica t ion descrip t ion complete isolated rs485/rs422 module transceiver + power the lt m ? 2881 is a complete galvanically isolated full-du - plex rs485/rs422 module ? (micromodule) transceiver. no external components are required. a single supply powers both sides of the interface through an integrated, isolated, low noise, efficient 5v output dc/dc converter. coupled inductors and an isolation power transformer provide 2500v rms of isolation between the line transceiver and the logic interface. this device is ideal for systems where the ground loop is broken allowing for large com - mon mode voltage variation. uninterrupted communica- tion is guaranteed for common mode transients greater than 30kv /s. maximum data rates are 20mbps or 250kbps in slew limited mode. t ransmit data, di and receive data, ro, are implemented with event driven low jitter processing. the receiver has a one-eighth unit load supporting up to 256 nodes per bus. a logic supply pin allows easy interfacing with different logic levels from 1.62v to 5.5v, independent of the main supply. enhanced esd protection allows this part to withstand up to 15kv (human body model) on the transceiver interface pins to isolated supplies and 10kv through the isolation barrier to logic supplies without latch-up or damage. l , lt, ltc, ltm, linear technology, the linear logo and module are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. isolated half-duplex rs485 module transceiver fea t ures a pplica t ions n rs485/rs422 transceiver: 2500v rms for 1 minute n ul recognized ? file #e151738 n isolated dc power: 5v at up to 200ma n no external components required n 20mbps or low emi 250kbps data rate n high esd: 15kv hbm on transceiver interface n high common mode transient immunity: 30kv/s n integrated selectable 120 termination n 3.3v (ltm2881-3) or 5.0v (ltm2881-5) operation n 1.62v to 5.5v logic supply pin for flexible digital interface n maximum continuous working v oltage: 560v peak n high input impedance failsafe rs485 receiver n current limited drivers and thermal shutdown n compatible with tia/eia-485-a and profibus n high impedance output during internal fault condition n low current shutdown mode (< 10a) n general purpose cmos isolated channel n small, low profile (15mm 11.25mm) surface mount bga and lga packages n isolated rs485/rs422 interface n industrial networks n breaking rs485 ground loops n isolated profibus-dp networks ltm2881 operating through 35kv/s cm transients 2881 ta01 twisted-pair cable available current: 150ma (ltm2881-5) 100ma (ltm2881-3) a v cc2 5v ro v l te re de di gnd gnd2 v cc 3.3v (ltm2881-3) 5v (ltm2881-5) ltm2881 b y z pwr isolation barrier 2881 ta01a 500v/div 50ns/div 1v/div 1v/div di multiple sweeps of common mode transients ro ltm2881 2881fh for more information www.linear.com/ltm2881
2 p in c on f igura t ion a bsolu t e maxi m u m r a t ings v cc to gnd .................................................. C 0.3v to 6v v cc2 to gnd2 ............................................... C 0.3v to 6v v l to gnd .................................................... C 0 .3v to 6v interface voltages (a, b, y, z) to gnd2 ........................ v cc2 C15v to 15v (a-b) with terminator enabled .............................. 6v signal voltages on, ro, di, de, re , te, d out to gnd ......................... C 0.3v to v l +0.3v signal voltages slo , d in to gnd2 .................................... C 0.3v to v cc2 +0.3v operating temperature range ltm2881c ............................................... 0 c to 70c ltm2881i ............................................. C 40c to 85c ltm2881h ......................................... C 40c to 105c ltm2881mp ...................................... C 55c to 105c maximum internal operating temperature ....... 1 25c storage temperature range .................. C 55c to 150c peak package body reflow temperature .............. 24 5c (note 1) bga package 32-pin (15mm 11.25mm 3.42mm) t jmax = 125c, ja = 32.2c/w, jctop = 27.2c/w, jcbottom = 20.9c/w, jb = 26.4c/w, weight = 1g lga package 32-pin (15mm 11.25mm 2.8mm) t jmax = 125c, ja = 31.1c/w, jctop = 27.3c/w, jcbottom = 19.5c/w, jb = 25.1c/w, weight = 1g top view slo d in ro v l on re dedited out 1 a b c d e f g h j k l 2 3 4 5 6 7 8 v cc2 z gnd2 gnd b a y v cc ltm2881 2881fh for more information www.linear.com/ltm2881
3 or d er in f or m a t ion part number input voltage pad or ball finish part marking package type msl rating temperature range device finish code ltm2881cy-3#pbf 3v to 3.6v sac305 (rohs) ltm2881y-3 e1 bga 3 0c to 70c ltm2881iy-3#pbf C40c to 85c ltm2881hy-3#pbf C40c to 105c ltm2881hy-3 snpb (63/37) e0 C40c to 105c ltm2881mpy-3#pbf sac305 (rohs) e1 C55c to 105c ltm2881mpy-3 snpb (63/37) e0 C55c to 105c ltm2881cy-5#pbf 4.5v to 5.5v sac305 (rohs) ltm2881y-5 e1 0c to 70c ltm2881iy-5#pbf C40c to 85c ltm2881hy-5#pbf C40c to 105c ltm2881hy-5 snpb (63/37) e0 C40c to 105c ltm2881mpy-5#pbf sac305 (rohs) e1 C55c to 105c ltm2881mpy-5 snpb (63/37) e0 C55c to 105c ltm2881cv-3#pbf 3v to 3.6v au (rohs) ltm2881y-3 e4 lga 0c to 70c ltm2881iv-3#pbf C40c to 85c ltm2881hv-3#pbf C40c to 105c ltm2881cv-5#pbf 4.5v to 5.5v ltm2881y-5 0c to 70c ltm2881iv-5#pbf C40c to 85c ltm2881hv-5#pbf C40c to 105c ? device temperature grade is indicated by a label on the shipping container. ? pad or ball finish code is per ipc/jedec j-std-609. ? t erminal finish part marking: www .linear.com/leadfree ? this product is not recommended for second side reflow . for more information, go to: www .linear.com/bga-assy ? recommended bga and lga pcb assembly and manufacturing procedures: www.linear.com/umodule/pcbassembly ? lga and bga package and t ray drawings: www .linear.com/packaging ? this product is moisture sensitive. for more information, go to: www.linear.com/umodule/pcbassembly ltm2881 2881fh for more information www.linear.com/ltm2881
4 e lec t rical c harac t eris t ics symbol parameter conditions min typ max units power supply v cc v cc supply voltage ltm2881-3 ltm2881-5 l l 3.0 4.5 3.3 5.0 3.6 5.5 v v v l v l supply voltage l 1.62 5.5 v i ccpoff v cc supply current in off mode on = 0v l 0 10 a i ccs v cc supply current in on mode ltm2881-3 de = 0v, re = v l , no load ltm2881-5 de = 0v, re = v l , no load ltm2881-5, h/mp-grade l l l 20 15 25 19 20 ma ma ma v cc2 regulated v cc2 output voltage, loaded ltm2881-3 de = 0v, re = v l , i load = 100ma ltm2881-5 de = 0v, re = v l , i load = 150ma ltm2881-3, h/mp-grade, i load = 90ma l l l 4.75 4.75 4.75 5.0 5.0 v v v v cc2noload regulated v cc2 output voltage, no load de = 0v, re = v l , no load 4.8 5.0 5.35 v efficiency i cc2 = 100ma, ltm2881-5 (note 2) 62 % i cc2s v cc2 short-circuit current de = 0v, re = v l , v cc2 = 0v 200 ma driver |v od | differential driver output voltage r = (figure 1) r = 27 (rs485) (figure 1) r = 50 (rs422) (figure 1) l l l 2.1 2.1 v cc2 v cc2 v cc2 v v v ?|v od | difference in magnitude of driver differential output voltage for complementary output states r = 27 or r = 50 (figure 1) l 0.2 v v oc driver common mode output voltage r = 27 or r = 50 (figure 1) l 3 v ?|v oc | difference in magnitude of driver common mode output voltage for complementar y output states r = 27 or r = 50 (figure 1) l 0.2 v i ozd driver three-state (high impedance) output current on y and z de = 0v, (y or z) = C7v, +12v de = 0v, (y or z) = C7v, +12v, h/mp-grade l l 10 50 a a i osd maximum driver short-circuit current C 7v (y or z) 12v (figure 2) l C 250 250 ma receiver r in receiver input resistance re = 0v or v l , v in = C7v, C3v, 3v, 7v, 12v (figure 3) re = 0v or v l , v in = C7v, C3v, 3v, 7v, 12v (figure 3), h/mp-grade l l 96 48 125 125 k k r te receiver termination resistance enabled te = v l , v ab = 2v, v b = C 7v, 0v, 10v (figure 8) l 108 120 156 i in receiver input current (a, b) on = 0v v cc2 = 0v or 5v, v in = 12v (figure 3) on = 0v v cc2 = 0v or 5v, v in = 12v (figure 3), h/mp-grade l l 125 250 a on = 0v v cc2 = 0v or 5v, v in = C7v (figure 3) on = 0v v cc2 = 0v or 5v, v in = C7v (figure 3), h/mp-grade l l C 100 C145 a v th receiver differential input threshold voltage (a-b) C7v b 12v l C 0.2 0.2 v ?v th receiver input failsafe hysteresis b = 0v 25 mv receiver input failsafe threshold b = 0v C 0.2 C0.05 0 v the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. ltm2881-3 v cc = 3.3v, ltm2881-5 v cc = 5.0v, v l = 3.3v, gnd = gnd2 = 0v, on = v l unless otherwise noted. ltm2881 2881fh for more information www.linear.com/ltm2881
5 symbol parameter conditions min typ max units logic v il logic input low voltage 1.62v v l 5.5v l 0.4 v v ih logic input high voltage d in slo di, te, de, on, re: v l 2.35v 1.62v v l < 2.35v l l l l 0.67?v cc2 2 0.67?v l 0.75?v l v v v v i inl logic input current l 0 1 a v hys logic input hysteresis (note 2) 150 mv v oh output high voltage output high, i load = C4ma (sourcing), 5.5v v l 3v output high, i load = C1ma (sourcing), 1.62v v l < 3v l l v l C0.4 v l C0.4 v v v ol output low voltage output low, i load = 4ma (sinking), 5.5v v l 3v output high, i load = 1ma (sinking), 1.62v v l < 3v l l 0.4 0.4 v v i ozr three-state (high impedance) output current on ro re = v l , 0v ro v l l 1 a i osr short-circuit current 0v (ro or d out ) v l l 85 ma e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. ltm2881-3 v cc = 3.3v, ltm2881-5 v cc = 5.0v, v l = 3.3v, gnd = gnd2 = 0v, on = v l unless otherwise noted. swi t ching c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. ltm2881-3 v cc = 3.3v, ltm2881-5 v cc = 5.0v, v l = 3.3v, gnd = gnd2 = 0v, on = v l unless otherwise noted. symbol parameter conditions min typ max units driver slo = v cc2 f max maximum data rate (note 3) 20 mbps t plhd t phld driver input to output r diff = 54, c l = 100pf (figure 4) l 60 85 ns ?t pd driver input to output difference |t plhd C t phld | r diff = 54, c l = 100pf (figure 4) l 1 8 ns t skewd driver output y to output z r diff = 54, c l = 100pf (figure 4) l 1 8 ns t rd t fd driver rise or fall time r diff = 54, c l = 100pf (figure 4) l 4 12.5 ns t zld , t zhd , t lzd , t hzd driver output enable or disable time r l = 500, c l = 50pf (figure 5) l 170 ns driver slo = gnd2 f max maximum data rate (note 3) 250 kbps t plhd t phld driver input to output r diff = 54, c l = 100pf (figure 4) 1 1.55 s ?t pd driver input to output difference |t plhd C t phld | r diff = 54, c l = 100pf (figure 4) 50 500 ns t skewd driver output y to output z r diff = 54, c l = 100pf (figure 4) 200 500 ns t rd t fd driver rise or fall time r diff = 54, c l = 100pf (figure 4) l 0.9 1.5 s ltm2881 2881fh for more information www.linear.com/ltm2881
6 isola t ion c harac t eris t ics t a = 25c, ltm2881-3 v cc = 3.3v, ltm2881-5 v cc = 5.0v, v l = 3.3v unless otherwise noted. symbol parameter conditions min typ max units v iso rated dielectric insulation voltage 1 minute (derived from 1 second test) 2500 v rms 1 second (notes 5, 6) 4400 v dc common mode transient immunity ltm2881-3 v cc = 3.3v, ltm2881-5 v cc = 5v, v l = on = 3.3v, v cm = 1kv, ?t = 33ns (note 2) 30 kv/s v iorm maximum working insulation voltage (notes 2, 5) 560 400 v peak v rms partial discharge v pr = 1050 v peak (note 2) 5 pc cti comparative tracking index iec 60112 (note 2) 600 v rms depth of erosion iec 60112 (note 2) 0.017 mm dti distance through insulation (note 2) 0.06 mm input to output resistance (notes 2, 5) 10 9 input to output capacitance (notes 2, 5) 6 pf creepage distance (notes 2, 5) 9.48 mm note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: guaranteed by design and not subject to production test. note 3: maximum data rate is guaranteed by other measured parameters and is not tested directly. note 4: this module transceiver includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above specified maximum operating junction temperature may result in device degradation or failure. note 5: device considered a 2-terminal device. pin group a1 through b8 shorted together and pin group k1 through l8 shorted together . note 6: the rated dielectric insulation voltage should not be interpreted as a continuous voltage rating. symbol parameter conditions min typ max units t zld , t zhd , t lzd , t hzd driver output enable or disable time r l = 500, c l = 50pf (figure 5) l 400 ns receiver t plhr t phlr receiver input to output c l = 15pf, v cm = 2.5v, |v ab | = 1.4v, t r and t f < 4ns, (figure 6) l 100 140 ns t skewr differential receiver skew |t plhr - t phlr | c l = 15pf (figure 6) l 1 8 ns t rr t fr receiver output rise or fall time c l = 15pf (figure 6) l 3 12.5 ns t zlr , t zhr , t lzr , t hzr receiver output enable time r l =1k, c l = 15pf (figure 7) l 50 ns t rten , t rtz termination enable or disable time re = 0v, de = 0v, v ab = 2v, v b = 0v (figure 8) l 100 s generic logic input t plhl1 t phll1 d in to d out input to output c l = 15pf, t r and t f < 4ns l 60 100 ns power supply generator v cc2 Cgnd2 supply start-up time (0v to 4.5v) on v l , no load l 325 800 s swi t ching c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. ltm2881-3 v cc = 3.3v, ltm2881-5 v cc = 5.0v, v l = 3.3v, gnd = gnd2 = 0v, on = v l unless otherwise noted. ltm2881 2881fh for more information www.linear.com/ltm2881
7 receiver skew vs temperature driver skew vs temperature driver propagation delay vs temperature typical p er f or m ance c harac t eris t ics receiver output voltage vs output current (source and sink) receiver propagation delay vs temperature supply current vs data rate r term vs temperature driver output low/high voltage vs output current driver differential output voltage vs temperature output current (ma) output voltage (v) 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 2881 g05 706050403020100 output high output low t a = 25c, ltm2881-3 v cc = 3.3v, ltm2881-5 v cc = 5.0v, v l = 3.3v unless otherwise noted. output current (ma) output voltage (v) 4 1 0 2 3 2881 g07 543210 sink source data rate (mbps) supply current (ma) 200 180 140 160 100 120 80 60 40 20 0 2881 g09 10 1 0.1 r = 54 (ltm2881-3) r = 100 (ltm2881-3) r = 54 (ltm2881-5) r = 100 (ltm2881-5) r = (ltm2881-3) r = (ltm2881-5) temperature (c) receiver skew (ns) 2.0 0 0.5 1.5 1.0 ?0.5 ?1.0 2881 g01 1251007550250?25?50 temperature (c) driver skew (ns) 2.0 0 0.5 1.5 1.0 ?0.5 ?1.0 2881 g02 1251007550250?25?50 temperature (c) driver prop delay (ns) 80 50 70 65 60 55 75 2881 g03 1251007550250?25?50 temperature (c) resistance () 130 110 112 114 116 118 120 122 124 126 128 2881 g04 1251007550250?25?50 temperature (c) output voltage (v) 6 1 0 2 4 3 5 2881 g06 1251007550250?25?50 r = r = 100 r = 54 temperature (c) receiver prop delay (ns) 120 115 110 105 100 95 90 2881 g08 1251007550250?25?50 ltm2881 2881fh for more information www.linear.com/ltm2881
8 typical p er f or m ance c harac t eris t ics t a = 25c, ltm2881-3 v cc = 3.3v, ltm2881-5 v cc = 5.0v, v l = 3.3v unless otherwise noted. v cc2 vs load current v cc supply current vs temperature at i load = 100ma on v cc2 v cc2 surplus current vs temperature v cc2 load current (ma) voltage (v) 6 4 5 3 2 2881 g12 180160 10 20 40 60 80 100 120 140 ltm2881-5 ltm2881-3 i cc2 output current (ma) 0 10 efficiency (%) 60 50 40 30 20 70 200 50 100 2881 g13 150 ltm2881-5 ltm2881-3 100s/div 2881 g14 v cc2 100mv/div i load 50ma/div 200s/div 2881 g15 10mv/div v cc2 power efficiency v cc2 load step (100ma) v cc2 noise temperature (c) i cc current (ma) 350 250 300 200 150 100 50 0 2881 g10 125100755025 ?25 0 ?50 ltm2881-3, v cc = 3.3v ltm2881-5, v cc = 5v temperature (c) surplus current (ma) 250 200 150 100 50 0 2881 g11 125100755025 ?25 0 ?50 ltm2881-5 (rs485 60ma) ltm2881-3 (rs485 60ma) ltm2881-3 (rs485 90ma) ltm2881-5 (rs485 90ma) ltm2881 2881fh for more information www.linear.com/ltm2881
9 logic side (v cc , v l , gnd) d out (pin a1): general purpose logic output. logic output connected through isolation path to d in . under the condition of an isolation communication failure d out is in a high impedance state. te (pin a2): terminator enable. a logic high enables a termination resistor (typically 120) between pins a and b. di (pin a3): driver input. if the driver outputs are enabled (de high), then a low on di forces the driver noninverting output (y) low and the inverting output (z) high. a high on di, with the driver outputs enabled, forces the driver noninverting output (y) high and inverting output (z) low. de (pin a4): driver enable. a logic low disables the driver leaving the outputs y and z in a high impedance state. a logic high enables the driver. re (pin a5): receiver enable. a logic low enables the receiver output. a logic high disables ro to a high imped - ance state. ro (pin a6): receiver output. if the receiver output is ena bled (re low) and if a C b is > 200mv, ro is a logic high, if a C b is < C200mv ro is a logic low. if the receiver inputs are open, shorted, or terminated without a valid signal, ro will be high. under the condition of an isolation communication failure ro is in a high impedance state. v l (pin a7): logic supply. interface supply voltage for pins ro, re, te, di, de, d out , and on. recommended operating voltage is 1.62v to 5.5v. internally bypassed to gnd with 2.2f. on (pin a8): enable. enables power and data communica - tion through the isolation barrier. if on is high the part is enabled and power and communications are functional to the isolated side. if on is low the logic side is held in reset and the isolated side is unpowered. gnd (pins b1-b5): cir cuit ground. v cc (pins b6-b8): supply voltage. recommended operat - ing voltage is 3v to 3.6v for ltm2881-3 and 4.5v to 5.5v for l tm2881-5. internally bypassed to gnd with 2.2f . p in func t ions isolated side (v cc2 , gnd2) d in (pin l1): general purpose isolated logic input. logic input on the isolated side relative to v cc2 and gnd2. a logic high on d in will generate a logic high on d out . a logic low on d in will generate a logic low on d out . slo (pin l2): driver slew rate control. a low input, rela - tive to gnd2, will force the driver into a reduced slew rate mode for reduced emi. a high input, relative to gnd2, puts the driver into full speed mode to support maximum data rates. y (pin l3): non inverting driver output. high impedance when the driver is disabled. z (pin l4): inverting driver output. high impedance when the driver is disabled. b (pin l5): inverting receiver input. impedance is > 96k in receive mode with te low or unpowered. a (pin l6): non inverting receiver input. impedance is > 96k in receive mode with te low or unpowered. v cc2 (pins l7-l8): isolated supply voltage. internally generated from v cc by an isolated dc/dc converter and regulated to 5v. internally bypassed to gnd2 with 2.2f. gnd2 (pins k1-k8): isolated side circuit ground. the pads should be connected to the isolated ground and/or cable shield. ltm2881 2881fh for more information www.linear.com/ltm2881
10 b lock diagra m 120 a y te re ro 2.2f 2.2f 2.2f v cc v l gnd d out z slo d in b 2881 bd v cc2 isolated dc/dc converter on di de = logic side common = isolated side common gnd2 isolated comm interface isolated comm interface 5v reg rx dx t es t circui ts ? + driver di gnd or v l r 2881 f01 y z r v oc ? + v od driver di gnd or v l 2881 f02 y z + ? i osd ?7v to 12v + ? receiver 2881 f03 a or b v in i in b or a v in i in r in = figure 1. driver dc characteristics figure 2. driver output short-circuit current figure 3. receiver input current and input resistance ltm2881 2881fh for more information www.linear.com/ltm2881
11 a b v cm v ab /2 v ab /2 ro c l 2881 f06a receiver t plhr t phlr 90% 0 90% 10% t r 90% 10% t f 90% 1/2 v l 1/2 v l t rr t fr 10% 2881 f06b 10% v ab v l 0 ?v ab ro a-b figure 6. receiver propagation delay measurements driver di v l or gnd gnd or v cc2 v cc2 or gnd r l r l c l 2881 f05a y z de c l t zld t zhd t hzd t lzd 1/2 v l 1/2 v cc2 1/2 v cc2 de y or z z or y v l v cc2 0v 0v 0.5v 0.5v 2881 f05b figure 5. driver enable and disable timing measurements t es t circui ts driver di r diff c l c l 2881 f04a y z 1/2 v od 90% 90% 0 0 10% 2881 f04b 10% v od v l y, z di (y-z) 0v t skewd t plhd t rd t fd t phld figure 4. driver timing measurement ltm2881 2881fh for more information www.linear.com/ltm2881
12 t es t circui ts a b 0v or v cc2 v cc2 or 0v ro re c l r l v l or gnd 2881 f07a receiver t zlr t zhr t hzr t lzr 1/2 v l 1/2 v l 1/2 v l re ro ro v l v l v ol v oh 0v 0v 0.5v 0.5v 2881 f07b figure 7. receiver enable/disable time measurements t rten t rtz v l b a i a te 2881 f08 receiver 90% 10% 0v te + ? + ? v ab v b r te = i a v ab 1/2 v l ro i a figure 8. termination resistance and timing measurements f unc t ional t able logic inputs mode a, b y, z ro dc/dc converter terminator on re te de 1 0 0 0 receive r in hi-z enabled on off 1 0 0 1 transceiver r in driven enabled on off 1 1 0 1 transmit r in driven hi-z on off 1 0 1 0 receive + term on r te hi-z enabled on on 0 x x x off r in hi-z hi-z off off ltm2881 2881fh for more information www.linear.com/ltm2881
13 overview the ltm2881 module transceiver provides a galvanically- isolated robust rs485/rs422 interface, powered by an integrated, regulated dc/dc converter, complete with decoupling capacitors. a switchable termination resistor is integrated at the receiver input to provide proper termi - nation to the rs485 bus. the ltm2881 is ideal for use in networks where grounds can take on different voltages. isolation in the ltm2881 blocks high voltage differences and eliminates ground loops and is extremely tolerant of common mode transients between ground potentials. error free operation is maintained through common mode events greater than 30kv/s providing excellent noise isolation. module technology the ltm2881 utilizes isolator module technology to translate signals and power across an isolation barrier. signals on either side of the barrier are encoded into pulses and translated across the isolation boundary using coreless transformers formed in the module substrate. this system, complete with data refresh, error checking, safe shutdown on fail, and extremely high common mode immunity, provides a robust solution for bidirectional signal isolation. the module technology provides the means to combine the isolated signaling with our rs485 transceiver and powerful isolated dc/dc converter in one small package. dc/dc converter the ltm2881 contains a fully integrated isolated dc/dc converter, including the transformer, so that no external components are necessary. the logic side contains a full- bridge driver, running about 2mhz, and is ac-coupled to a single transformer primary. a series dc blocking capacitor prevents transformer saturation due to driver duty cycle imbalance. the transformer scales the primary voltage, and is rectified by a full-wave voltage doubler. this topology eliminates transformer saturation caused by secondary imbalances. the dc/dc converter is connected to a low dropout reg - ulator (ldo) to provide a regulated low noise 5v output. the internal power solution is sufficient to support the transceiver interface at its maximum specified load and data a pplica t ions i n f or m a t ion rate, and external pins are supplied for extra decoupling (optional) and heat dissipation. the logic supplies, v cc and v l have a 2.2f decoupling capacitance to gnd and the isolated supply v cc2 has a 2.2f decoupling capacitance to gnd2 within the module package. v cc2 output the on-board dc/dc converter provides isolated 5v power to output v cc2 . v cc2 is capable of suppling up to 1w of power at 5v in the ltm2881-5 option and up to 600mw of power in the ltm2881-3 option. this surplus current is available to external applications. the amount of surplus current is dependent upon the implementation and current delivered to the rs485 driver and line load. an example of available surplus current is shown in the typical per - formance characteristics graph, v cc2 surplus current vs temperature. figure 19 demonstrates a method of using the v cc2 output directly and with a switched power path that is controlled with the isolated rs485 data channel. driver the driver provides full rs485 and rs422 compatibility. when enabled, if di is high, yCz is positive. when the driver is disabled, both outputs are high impedance with less than 10a of leakage current over the entire common mode range of C7v to 12v, with respect to gnd2. driver overvoltage and overcurrent protection the driver outputs are protected from short circuits to any voltage within the absolute maximum range of (v cc2 C15v) to (gnd2 +15v) levels. the maximum v cc2 cur- rent in this condition is 250ma. if the pin voltage exceeds about 10v , current limit folds back to about half of the peak value to reduce overall power dissipation and avoid damaging the part. the device also features thermal shutdown protection that disables the driver and receiver output in case of excessive power dissipation (see note 4 in the electrical characteristics section). slo mode the ltm2881 features a logic-selectable reduced slew rate mode (slo mode) that softens the driver output edges to ltm2881 2881fh for more information www.linear.com/ltm2881
14 reduce emi emissions from equipment and data cables. the reduced slew rate mode is entered by taking the slo pin low to gnd2, where the data rate is limited to about 250kbps. slew limiting also mitigates the adverse effects of imperfect transmission line termination caused by stubs or mismatched cables. figures 9a and 9b show the frequency spectrums of the ltm2881 driver outputs in normal and slo mode operat - ing at 250kbps. slo mode significantly reduces the high frequency harmonics. receiver and failsafe with the receiver enabled, when the absolute value of the di ff erential voltage between the a and b pins is greater than 200mv, the state of ro will reflect the polarity of (a-b). during data communication the receiver detects the state of the input with symmetric thresholds around 0v. the symmetric thresholds preser ve duty cycle for attenu - ated signals with slow transition rates on high capacitive busses, or long cable lengths. the receiver incorporates a failsafe feature that guarantees the receiver output to be a logic-high during an idle bus, when the inputs are shorted, left open or terminated, but not driven. the failsafe feature eliminates the need for system level integration of network pre-biasing by guaranteeing a logic-high on ro under the conditions of an idle bus. further network bias - ing constructed to condition transient noise during an idle state is unnecessar y due to the common mode transient rejection of the ltm2881. the failsafe detector monitors a and b in parallel with the receiver and detects the state a pplica t ions i n f or m a t ion figure 9a. frequency spectrum slo mode 125khz input figure 9b. normal mode frequency spectrum 125khz input frequency (mhz) y-z 10db/div 2881 f09a 12.5 6.25 0 frequency (mhz) y-z 10db/div 2881 f09b 12.5 6.25 0 of the bus when a-b is above the input failsafe threshold for longer than about 3s with a hysteresis of 25mv. this failsafe feature is guaranteed to work for inputs spanning the entire common mode range of C7v to 12v. the receiver output is internally driven high (to v l ) or low (to gnd) with no external pull-up needed. when the receiver is disabled the ro pin becomes hi-z with leakage of less than 1a for voltages within the supply range. receiver input resistance the receiver input resistance from a or b to gnd2 is greater than 96k permitting up to a total of 256 receivers per system without exceeding the rs485 receiver loading specification. high temperature h-/mp-grade operation reduces the input resistance to 48k permitting 128 re - ceivers on the bus. the input resistance of the receiver is unaffected by enabling/disabling the receiver or by power - ing/unpowering the part. the equivalent input resistance looking into a and b is shown in figure 10. figure 10. equivalent input resistance into a and b 60 60 a te b 2881 f10 >96k >96k ltm2881 2881fh for more information www.linear.com/ltm2881
15 a pplica t ions i n f or m a t ion switchable termination proper cable termination is very important for signal fi - delity. if the cable is not terminated with its characteristic impedance, reflections will distort the signal waveforms. the integrated switchable termination resistor provides logic control of the line termination for optimal per for - ma nce when configuring transceiver networks. when the te pin is high, the termination resistor is enabled and the differential resistance from a to b is 120. figure 11 shows the i/v characteristics between pins a and b with the termination resistor enabled and disabled. the resistance is maintained over the entire rs485 common mode range of C7v to 12v as shown in figure 12. the integrated termination resistor has a high frequency re - sponse which does not limit performance at the maximum specified data rate. figure 13 shows the magnitude and figure 13. termination magnitude and phase vs frequency figure 12. termination resistance vs common mode voltage figure 11. curve trace between a and b with termination enabled and disabled 2881 f11 common mode voltage (v) resistance () 130 128 126 124 122 120 118 116 114 112 110 2881 g11 15105 ?5 0 ?10 frequency (mhz) magnitude () phase (degrees) 150 140 130 120 110 100 10 0 ?10 ?20 ?30 ?40 2881 f13 10 1 0.1 phase magnitude figure 14. supply current vs data rate data rate (mbps) 2881 f14 10 1 0.1 supply current (ma) 250 230 210 190 170 150 130 110 90 70 50 ltm2881-3 r=54 cl=1000p r=54 cl=100p r=54 cl=0 ltm2881-5 r=54 cl=1000p r=54 cl=100p r=54 cl=0 phase of the termination impedance versus frequency. the termination resistor cannot be enabled by te if the device is unpowered, on is low or the ltm2881 is in thermal shutdown. supply current the static supply current is dominated by power delivered to the termination resistance. power supply current increases with data rate due to capacitive loading. figure 14 shows supply current versus data rate for three different loads for the circuit configuration of figure 4. supply current increases with additional external applications drawing current from v cc2 . ltm2881 2881fh for more information www.linear.com/ltm2881
16 profibus applications the ltm2881 can be used in profibus-dp networks where isolation is required. the standard profibus termination differs from rs485 termination and is shown in figure?15. if used in this way, the internal termination should remain disabled (te low). the 390 resistors in figure?15 pre-bias the bus so that when the line is not driven, the receiver delivers a high output. since the l tm2881 uses a fail-safe receiver, the pre-biasing resistors are not necessar y and standard rs485 termination can be used with control from te. v cc2 , provides an isolated source for the external termina - tion resistor as shown in the figure 15. when using the l tm2881 in profibus applications, it is recommended that no additional loads are connected to v cc2 in order to maintain the specified driver output swing. ? input and out put dec oupling is not req uired, sin ce the se components are integrated within the package. an ad - ditional bulk capacitor with a value of 6.8f to 22f is recommended. the high esr of this capacitor reduces board resonances and minimize s voltage spikes caused by hot plugging of the supply voltage. for emi sensitive applications, an additional low esl ceramic capacitor of 1f to 4.7f, placed as close to the power and ground terminals as possible, is recommended. alternatively, a number of smaller value parallel capacitors may be used to reduce esl and achieve the same net capacitance. ? do not place copper on the pcb between the inner col - umns of pads. this area must remain open to withstand the rated isolation voltage. ? the use of solid ground planes for gnd and gnd2 is recommended for non-emi critical applications to optimize signal fidelity, thermal performance, and to minimize rf emissions due to uncoupled pcb trace conduction. the drawback of using ground planes, where emi is of concern, is the creation of a dipole antenna structure which can radiate differential voltages formed between gnd and gnd2. if ground planes are used it is recommended to minimize their area, and use contiguous planes as any openings or splits can exacerbate rf emissions. ? for large ground planes a small capacitance ( 330pf) from gnd to gnd2, either discrete or embedded within the substrate, provides a low impedance current return path for the module parasitic capacitance, minimizing any high frequency differential voltages and substantially reducing radiated emissions. discrete capacitance will not be as effective due to parasitic esl. in addition, volt - age rating, leakage, and clearance must be considered for component selection. embedding the capacitance within the pcb substrate provides a near ideal capacitor and eliminates component selection issues; however, the pcb must be 4 layers. care must be exercised in applying either technique to insure the voltage rating of the barrier is not compromised. a pplica t ions i n f or m a t ion pcb layout considerations the high integration of the ltm2881 makes pcb layout very simple. however, to optimize its electrical isolation characteristics, emi, and thermal performance, some layout considerations are necessary. ? under heavily loaded conditions v cc and gnd current can exceed 300ma. sufficient copper must be used on the pcb to insure resistive losses do not cause the supply voltage to drop below the minimum allowed level. similarly, the v cc2 and gnd2 conductors must be sized to support any external load current. these heavy copper traces will also help to reduce thermal stress and improve the thermal conductivity. figure 15. profibus-dp connections with termination a 390 3.3v (ltm2881-3) 5v (ltm2881-5) 220 390 shield profibus cable type a v l de ro di gnd v cc v cc2 2881 f15 b y z te pwr gnd2 ltm2881 isolation barrier ltm2881 2881fh for more information www.linear.com/ltm2881
17 a pplica t ions i n f or m a t ion technology figure 16a. low emi demo board layout figure 16b. low emi demo board layout (dc1746a), top layer figure 16c. low emi demo board layout (dc1746a), inner layer 1 ltm2881 2881fh for more information www.linear.com/ltm2881
18 a pplica t ions i n f or m a t ion figure 16d. low emi demo board layout (dc1746a), inner layer 2 figure 16e. low emi demo board layout (dc1746a), bottom layer figure 17. low emi demo board emissions frequency (mhz) 0 dbv/m 60 50 40 30 20 ?20 ?10 0 ?30 400 200 600 2881 f17 1000 300 100 500 700 900800 10 detector = quasipeak r bw = 120khz, v bw = 300khz sweep time = 17sec # of points = 501 dc1746a-b cispr 22 class 8 limit ltm2881 2881fh for more information www.linear.com/ltm2881
19 a pplica t ions i n f or m a t ion figure 18. cable length vs data rate the pcb layout in figures 16a to 16e show the low emi demo board for the ltm2881. the demo board uses a combination of emi mitigation techniques, including both embedded pcb bridge capacitance and discrete gnd to gnd2 capacitors. two safety rated type y2 capacitors are used in series, manufactured by murata, part number ga342qr7gf471kw01l. the embedded capacitor ef - fectively suppresses emissions above 400mhz, whereas the discrete capacitors are more effective below 400mhz. emi per formance is shown in figure 17, measured using a gigahertz t ransverse electromagnetic (gtem) cell and method detailed in iec 61000-4-20, testing and mea - surement techniques C emission and immunity testing in t ransverse electromagnetic w aveguides. cable length versus data rate for a given data rate, the maximum transmission distance is bounded by the cable properties. a typical curve of cable length versus data rate compliant with the rs485 standard is shown in figure 18. three regions of this curve reflect different performance limiting factors in data transmission. in the flat region of the curve, maximum distance is determined by resistive loss in the cable. the downward sloping region represents limits in distance and rate due to the ac losses in the cable. the solid vertical line represents the specified maximum data rate in the rs485 standard. the dashed line at 250kbps shows the maximum data rate when slo is low. the dashed line at 20mbps shows the maximum data rate when slo is high. rf, magnetic field immunity the ltm2881 has been independently evaluated and has successfully passed the rf and magnetic field immunity testing requirements per european standard en 55024, in accordance with the following test standards: en 61000-4-3 radiated, radio-frequency, electromagnetic field immunity en 61000-4-8 power frequency magnetic field immunity en 61000-4-9 pulsed magnetic field immunity t ests were performed using an unshielded test card de - signed per the data sheet pcb layout recommendations. specific limits per test are detailed in table 1. table 1 test frequency field strength en 61000-4-3, annex d 80mhz to 1ghz 10v/m 1.4mhz to 2ghz 3v/m 2ghz to 2.7ghz 1v/m en 61000-4-8, level 4 50hz and 60hz 30a/m en 61000-4-8, level 5 60hz 100a/m* en 61000-4-9, level 5 pulse 1000a/m *non iec method 2881 f18 data rate (bps) cable length (ft) 10k 1m 10m 100k 100m 100 1k 10 10k low-emi mode max data rate rs485 max data rate normal mode max data rate ltm2881 2881fh for more information www.linear.com/ltm2881
20 typical a pplica t ions figure 21. switched 5v power with isolated cmos logic connection with low voltage interface figure 22. 4-wire full duplex self biasing for unshielded cat5 connection 2881 f21 a v cc2 ro v l te re de di d out gnd gnd2 v cc v cc cmos input cmos output b z 1.8v d in pwr onoff regulated 5v switched 5v irlml6402 330k ltm2881 isolation barrier a v l re de ro di gnd v cc v cc b y z pwr gnd2 ltm2881 isolation barrier y v l re ro de di gnd v cc v ccb 2881 f22 z a b pwr gnd2 bus inherited ltm2881 10nf 51 51 51 51 10nf isolation barrier b figure 19. isolated system fault detection a v l re de te ro di d out d in gnd fault v cc v cc b y z gnd2 330k 2881 f19 ltm2881 isolation barrier figure 20. full-duplex rs485 connection a v l re de te ro di gnd v cc v cc 2881 f20 b y z pwr gnd2 ltm2881 isolation barrier ltm2881 2881fh for more information www.linear.com/ltm2881
21 5. primary datum -z- is seating plane 6. solder ball composition is 96.5% sn/3.0% ag/0.5% cu 7 package row and column labeling may vary among module products. review each package layout carefully ! notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature package top view 4 pin ?a1? corner x y aaa z aaa z package bottom view 3 see notes suggested pcb layout top view bga 32 1112 rev d ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pin ?a1? detail a pin 1 0.000 0.635 0.635 1.905 1.905 3.175 3.175 4.445 4.445 6.350 6.350 5.080 5.080 0.000 detail a ?b (32 places) f g h l j k e a b c d 2 1 4 3 5678 detail b substrate 0.27 ? 0.37 2.45 ? 2.55 // bbb z d a a1 b1 ccc z detail b package side view mold cap z m x yzddd m zeee 0.630 0.025 ? 32x symbol a a1 a2 b b1 d e e f g aaa bbb ccc ddd eee min 3.22 0.50 2.72 0.60 0.60 nom 3.42 0.60 2.82 0.75 0.63 15.0 11.25 1.27 12.70 8.89 max 3.62 0.70 2.92 0.90 0.66 0.15 0.10 0.20 0.30 0.15 notes dimensions total number of balls: 32 e b e e b a2 f g bga package 32-lead (15mm 11.25mm 3.42mm) (reference ltc dwg # 05-08-1851 rev d) 7 see notes p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. ltm2881 2881fh for more information www.linear.com/ltm2881
22 p ackage descrip t ion lga package 32-lead (15mm 11.25mm 2.8mm) (reference ltc dwg # 05-08-1773 rev q) notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222 5. primary datum -z- is seating plane 6. the total number of pads: 32 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or marked feature detail b detail b substrate mold cap 0.290 ? 0.350 2.400 ? 2.600 bbb z z package top view 11.25 bsc 15.00 bsc 4 pad ?a1? corner x y aaa z aaa z package bottom view 3 pads see notes suggested pcb layout top view lga 32 0308 rev ? ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pin ?a1? 8.89 bsc 1.27 bsc pad 1 0.635 0.635 1.905 1.905 3.175 3.175 4.445 4.445 6.350 6.350 5.080 5.080 0.000 symbol aaa bbb eee tolerance 0.10 0.10 0.05 detail a 0.630 0.025 ? 32x s yxeee detail c 0.630 0.025 ? 32x s yxeee f g h l j k e a b c d 2 1 4 3 567 2.69 ? 2.95 detail a 12.70 bsc 8 detail c please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. ltm2881 2881fh for more information www.linear.com/ltm2881
23 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 3/10 changes to features, description and typical application add bga package to pin configuration, order information and package description sections changes to lga package in pin configuration section changes to electrical characteristics section changes to graphs g09, g13, g14 update to pin functions update to applications information change to x-axis on figures 9a and 9b update to supply current section pcb layout isolation considerations section replaced rf , magnetic field immunity section added changes to related parts 1 2, 19 2 3 6, 7 8 12 13 14 15 16 22 b 8/10 h-grade parts added. reflected throughout the data sheet. 1-22 c 5/11 hv-grade parts removed. reflected throughout the data sheet. updated the pcb layout section. updated the related parts. 1-24 15, 16, 17 24 d 1/12 hv and mpy parts added. reflected throughout the data sheet. 1-24 e 4/12 added h/mp-grade condition for i ozd corrected figure 15 3 15 f 2/13 storage temperature range corrected 2 g 4/14 added lead finish part numbers added cti and dti parameters 3 6 h 8/14 i cc2s , v cc2 short-circuit current: deleted max spec. added typical spec. removed temp dot. 4 ltm2881 2881fh for more information www.linear.com/ltm2881
24 linear technology corporation 1630 mccarthy bl vd., mi lpitas, ca 95 035-7417 ? linear technology corporation 2009 lt 0814 rev h ? printed in usa (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltm2881 r ela t e d p ar t s typical a pplica t ion part number description comments ltm2882 dual isolated rs232 module transceiver + power 1mbps, 10kv hbm esd, 2500v rms ltc1535 isolated rs485 transceiver 2500v rms isolation in surface mount package lt1785 60v fault-protected transceiver half duplex lt1791 60v fault-protected transceiver full duplex ltc2861 20mbps rs485 transceivers with integrated switchable termination full duplex 15kv esd ltc2870/ltc2871 rs232/rs485 multiprotocol transceivers with integrated termination 20mbps rs485 and 500kbps rs232, 26kv esd, 3v to 5v operation l tc2862/l tc2863/ ltc2864/ltc2865 60v fault protected 3v to 5.5v rs485/rs422 transceivers 20mbps or 250kbps, 15kv hbm esd, 25v common mode range ltm2883 spi/digital or i 2 c isolated module with adjustable 5v and 12v rails 2500v rms isolation with power in bga package ltm2892 spi/digital or i 2 c isolated module 3500v rms isolation, 6 channels figure 23. multi-node network with end termination and single ground connection on isolation bus a v l v cc1 re de te ro di gnd v cc v cca 2881 f23 b y z a pwr gnd2 a v l re de te ro di gnd v cc v ccc b y z pwr gnd2 a v l re de te ro di gnd v cc v ccb b y z pwr gnd2 ltm2881 ltm2881 ltm2881 v cc2 c b cable shield or ground return isolation barrier isolation barrier isolation barrier b ltm2881 2881fh for more information www.linear.com/ltm2881


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